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LT1969 Dual 700MHz, 200mA, Adjustable Current Operational Amplifier
FEATURES
s s s s s s s s s s s s s s
DESCRIPTIO
700MHz Gain Bandwidth 200mA Minimum IOUT Adjustable Quiescent Current Low Distortion: -72dBc at 1MHz, 4VP-P, 25, AV = 2 Stable in AV 10, Simple Compensation for AV < 10 4.3V Minimum Output Swing, VS = 6V, RL = 25 Stable with 1000pF Load 6nV/Hz Input Noise Voltage 2pA/Hz Input Noise Current 4mV Maximum Input Offset Voltage 4A Maximum Input Bias Current 400nA Maximum Input Offset Current 4.5V Minimum Input CMR, VS = 6V Specified at 6V, 2.5V
The LT(R)1969 is an adjustable current version of the popular LT1886, a 200mA minimum output current, dual op amp with outstanding distortion performance. The adjustable current feature is highly desirable in applications where minimum power dissipation is required while still being able to provide adequate line termination. At nominal supply current, the amplifiers are gain of 10 stable and can easily be compensated for lower gains. The LT1969 features balanced high impedance inputs with 4A input bias current and 4mV maximum input offset voltage. Single supply applications are easy to implement and have lower total noise than current feedback amplifier implementations. The output drives a 25 load to 4.3V with 6V supplies. On 2.5V supplies, the output swings 1.5V with a 100 load. The amplifier is stable with a 1000pF capacitive load making it useful in buffer and cable driver applications. The LT1969 is manufactured on Linear Technology's advanced low voltage complementary bipolar process and is available in a thermally enhanced MS10 package
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
s s s s
DSL Modems xDSL PCI Cards USB Modems Line Drivers
TYPICAL APPLICATIO
12V 0.1F IN +
Single 12V Supply ADSL Modem Line Driver ADSL Modem Line Driver Distortion
-60 12.4
HARMONIC DISTORTION (dBc)
+
1/2 LT1969
-
909 10k 20k 100 1:2* *COILCRAFT X8390-A OR EQUIVALENT
100 1F 10k 20k 1F 100 909 CTRL1 CTRL2 IQ ON = 14mA IQ LOW POWER = 2mA IQ STANDBY = 600A STANDBY ON LOGIC OUTPUT STANDBY LOW POWER ON
1969 TA01a
6 12.4 13k
7 49.9k
0.1F IN -
1/2 LT1969
U
-70 VS = 12V AV = 10 f = 200kHz 100 LINE 1:2 TRANSFORMER HD2 -80 -90 HD3 -100 0 2 4 6 8 10 12 LINE VOLTAGE (VP-P) 14 16
1969 TA01b
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+
-
U
1
LT1969
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE/ORDER I FOR ATIO
ORDER PART NUMBER
TOP VIEW V+ OUTA -INA +INA V- 1 2 3 4 5 10 9 8 7 6 OUTB -INB +INB CTRL2 CTRL1
Total Supply Voltage (V + to V -) ........................... 13.2V Input Current (Note 2) ....................................... 10mA Input Voltage (Note 2) ............................................ VS Maximum Continuous Output Current (Note 3) DC ............................................................... 100mA AC ............................................................... 300mA Operating Temperature Range (Note 10) - 40C to 85C Specified Temperature Range (Note 9) .. - 40C to 85C Maximum Junction Temperature ......................... 150C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
LT1969CMS
MS10 PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 150C, JA = 110C/W (NOTE 4)
MS10 PART MARKING LTTN
Consult factory for parts specified with wider operating temperature ranges.
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 6V, VCM = 0V, nominal mode with a 13k resistor from CTRL1 to V - and a 49.9k resistor from CTRL2 to V -, pulse power tested unless otherwise noted. (Note 9)
SYMBOL VOS PARAMETER Input Offset Voltage Input Offset Voltage Drift IOS IB en in RIN CIN Input Offset Current
q
ELECTRICAL CHARACTERISTICS
(Note 5)
CONDITIONS
q
MIN
TYP 1
MAX 4 5 17 400 600 4 6
UNITS mV mV V/C nA nA A A nV/Hz pA/Hz M k pF V V dB V dB dB V/mV V/mV V/mV V/mV V V V V V V
(Note 8)
q
3 150 1.5
Input Bias Current
q
Input Noise Voltage Input Noise Current Input Resistance Input Capacitance Input Voltage Range (Positive) Input Voltage Range (Negative)
f = 10kHz f = 10kHz VCM = 4.5V Differential
q q
6 2 5 10 35 2 4.5 77 80 78 5.0 4.5 4.5 4.0 4.85 4.70 4.30 4.10 4.30 4.10 5.9 - 5.2 98 2 86 12 12 5 4.6 4.5 - 4.5
CMRR PSRR AVOL
Common Mode Rejection Ratio Minimum Supply Voltage Power Supply Rejection Ratio Large-Signal Voltage Gain
VCM = 4.5V Guaranteed by PSRR VS = 2V to 6.5V
q q q
VOUT = 4V, RL = 100
q
VOUT = 4V, RL = 25
q
VOUT
Output Swing
RL = 100, 10mV Overdrive
q
RL = 25, 10mV Overdrive
q
IOUT = 200mA, 10mV Overdrive
q
2
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W
LT1969
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 6V, VCM = 0V, nominal mode with a 13k resistor from CTRL1 to V - and a 49.9k resistor from CTRL2 to V -, pulse power tested unless otherwise noted. (Note 9)
SYMBOL ISC SR GBW tr, tf PARAMETER Short-Circuit Current (Sourcing) Short-Circuit Current (Sinking) Slew Rate Full Power Bandwidth Gain Bandwidth Rise Time, Fall Time Overshoot Propagation Delay tS Settling Time Harmonic Distortion IMD ROUT IS Intermodulation Distortion Output Resistance Supply Current CTRL1 Voltage CTRL2 Voltage Minimum Supply Current Maximum Supply Current CONDITIONS (Note 3) AV = -10 (Note 6) 4V Peak (Note 7) f = 1MHz AV = 10, 10% to 90% of 0.1V, RL = 100 AV = 10, 0.1V, RL = 100 AV = 10, 50% VIN to 50% VOUT, 0.1V, RL = 100 6V Step, 0.1% HD2, AV = 10, 2VP-P, f = 1MHz, RL = 100/25 HD3, AV = 10, 2VP-P, f = 1MHz, RL = 100/25 AV = 10, f = 0.9MHz, 1MHz, 14dBm, RL = 100/25 AV = 10, f = 1MHz Per Amplifier
q
ELECTRICAL CHARACTERISTICS
MIN
TYP 700 500
MAX
UNITS mA mA V/s MHz MHz ns % ns ns dBc dBc dBc
100
200 8 700 4 1 2.5 50 -75/-63 -85/-71 -81/-80 0.1 7 8.25 8.50 1.25 1.30 1.18 1.25 800 1100
mA mA V V V V A A mA
13k to V -, Measured with Respect to
V-
q
0.77 0.74 0.87 0.80
0.97 1.05 300
49.9k to V -, Measured with Respect to V -
q
per Amplifier; CTRL1, CTRL2 Open
q
per Amplifier; CTRL1 or CTRL2 Shorted to V -
13
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 2.5V, VCM = 0V, nominal mode with a 13k resistor from CTRL1 to V - and a 49.9k resistor from CTRL2 to V -, pulse power tested unless otherwise noted. (Note 9)
SYMBOL VOS PARAMETER Input Offset Voltage Input Offset Voltage Drift IOS IB en in RIN CIN Input Offset Current
q
CONDITIONS (Note 5)
q
MIN
TYP 1.5
MAX 5 6 17 350 550 3.5 5.5
UNITS mV mV V/C nA nA A A nV/Hz pA/Hz M k pF V V dB
(Note 8)
q
5 100 1.2
Input Bias Current
q
Input Noise Voltage Input Noise Current Input Resistance Input Capacitance Input Voltage Range (Positive) Input Voltage Range (Negative)
f = 10kHz f = 10kHz VCM = 1V Differential
q q
6 2 10 20 50 2 1 75 2.4 -1.7 91 -1
CMRR
Common Mode Rejection Ratio
VCM = 1V
q
3
LT1969
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 2.5V, VCM = 0V, nominal mode with a 13k resistor from CTRL1 to V - and a 49.9k resistor from CTRL2 to V -, pulse power tested unless otherwise noted. (Note 9)
SYMBOL AVOL PARAMETER Large-Signal Voltage Gain CONDITIONS VOUT = 1V, RL = 100
q
ELECTRICAL CHARACTERISTICS
MIN 5.0 4.5 4.5 4.0 1.50 1.40 1.35 1.25 0.87 0.80
TYP 10 10 1.65 1.50 1 500 400
MAX
UNITS V/mV V/mV V/mV V/mV V V V V V V mA mA V/s MHz MHz ns % ns dBc dBc dBc dB dB
VOUT = 1V, RL = 25
q
VOUT
Output Swing
RL = 100, 10mV Overdrive
q
RL = 25, 10mV Overdrive
q
IOUT = 200mA, 10mV Overdrive
q
ISC SR GBW tr, tf
Short-Circuit Current (Sourcing) Short-Circuit Current (Sinking) Slew Rate Full Power Bandwidth Gain Bandwidth Rise Time, Fall Time Overshoot Propagation Delay Harmonic Distortion
(Note 3) AV = -10 (Note 6) 1V Peak (Note 7) f = 1MHz AV = 10, 10% to 90% of 0.1V, RL = 100 AV = 10, 0.1V, RL = 100 AV = 10, 50% VIN to 50% VOUT, 0.1V, RL = 100 HD2, AV = 10, 2VP-P, f = 1MHz, RL = 100/25 HD3, AV = 10, 2VP-P, f = 1MHz, RL = 100/25 AV = 10, f = 0.9MHz, 1MHz, 5dBm, RL = 100/25 AV = 10, f = 1MHz VOUT = 1V, RL = 25
q
50
100 16 530 7 5 5 -75/- 64 - 80/- 66 - 77/- 85 0.2
IMD ROUT
Intermodulation Distortion Output Resistance Channel Separation
82 80
92 5 6.00 6.25 1.25 1.30 1.18 1.25 650 750
IS
Supply Current CTRL1 Voltage CTRL2 Voltage Minimum Supply Current Maximum Supply Current
Per Amplifier
q
mA mA V V V V A A mA
13k to V -, Measured with Respect to V-
q
0.77 0.74 0.87 0.80
0.95 1.03 250
49.9k to V -, Measured with Respect to V-
q
per Amplifier; CTRL1, CTRL2 Open
q
per Amplifier; CTRL1 or CTRL2 Shorted to V -
11.5
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The inputs are protected by back-to-back diodes. If the differential input voltage exceeds 0.7V, the input current should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum. Note 4: Thermal resistance varies depending upon the amount of PC board metal attached to the device. JA is specified for a 2500mm2 test board covered with 2 oz copper on both sides. Note 5: Input offset voltage is exclusive of warm-up drift.
Note 6: Slew rate is measured between 2V on a 4V output with 6V supplies, and between 1V on a 1.5V output with 2.5V supplies. Falling slew rate is guaranteed by correlation to rising slew rate. Note 7: Full power bandwidth is calculated from the slew rate: FPBW = SR/2VP. Note 8: This parameter is not 100% tested. Note 9: The LT1969C is guaranteed to meet specified performance from 0C to 70C. The LT1969C is designed, characterized and expected to meet specified performance from -40C to 85C but is not tested or QA sampled at these temperatures. Note 10: The LT1969C is guaranteed functional over the operating temperature range of -40C to 85C.
4
LT1969 TYPICAL PERFOR A CE CHARACTERISTICS - -
13k resistor from CTRL1 to V and a 49.9k resistor from CTRL2 to V Supply Current vs Temperature
SUPPLY CURRENT, BOTH AMPLIFIERS (mA)
20 18 -0.1
COMMON MODE RANGE (V)
14 12 10 8 6 4 2 0 -50 -25
VS = 6V VS = 2.5V
-0.2 -0.3 1.5 1.0 0.5 V- 0 TA = 25C VOS > 1mV 2 4 6 8 10 12 TOTAL SUPPLY VOLTAGE (V) 14
INPUT BIAS CURRENT (A)
16
50 25 0 75 TEMPERATURE (C)
Input Bias Current vs Temperature
3.5 3.0
INPUT BIAS CURRENT (A)
IB = (IB+ - IB-)/2
INPUT VOLTAGE NOISE (nV/Hz)
OUTPUT SATURATION VOLTAGE (V)
2.5 2.0 1.5 VS = 6V 1.0 0.5 0 -50 -25 VS = 2.5V
50 25 75 0 TEMPERATURE (C)
Output Saturation Voltage vs Temperature
V
OUTPUT SATURATION VOLTAGE (V)
+
OUTPUT SHORT-CIRCUIT CURRENT (mA)
VS = 2.5V RL = 100 150mA 200mA
-0.5 -1.0 -1.5 1.5 1.0 150mA 0.5 V- -50 -25
OUTPUT STEP (V)
200mA
RL = 100
50 25 75 0 TEMPERATURE (C)
UW
100
1969 G01
Input Common Mode Range vs Supply Voltage
V+
Input Bias Current vs Input Common Mode Voltage
3.0 2.5 2.0 VS = 6V 1.5 1.0 0.5 0 -6 -4 -2 0 2 4 INPUT COMMON MODE VOLTAGE (V) 6 VS = 2.5V TA = 25C IB = (IB + + IB -)/2
125
1969 G02
1969 G03
Input Noise Spectral Density
100 TA = 25C AV = 101 100 INPUT CURRENT NOISE (pA/Hz)
V+ -0.5
Output Saturation Voltage vs Temperature
VS = 6V RL = 100 -1.0 150mA -1.5 1.5 1.0 150mA 0.5 V- -50 -25 RL = 100 200mA 200mA
10 en in
10
100
125
1 10
100
1k 10k FREQUENCY (Hz)
1 100k
1969 G04
50 25 75 0 TEMPERATURE (C)
100
125
1969 G43
1969 G44
Output Short-Circuit Current vs Temperature
1000 900 800 700 600 500 400 300 200 100 0 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125
-6 6
Settling Time vs Output Step
VS = 6V 10mV 2 0 -2 -4 10mV 0 10 20 30 40 SETTLING TIME (ns) 1mV 50 60
1886 G05
SOURCE VS = 6V SOURCE VS = 2.5V
4 1mV
SINK VS = 6V
SINK VS = 2.5V
100
125
1969 G45
1969 G46
5
LT1969 TYPICAL PERFOR A CE CHARACTERISTICS - -
13k resistor from CTRL1 to V and a 49.9k resistor from CTRL2 to V Gain and Phase vs Frequency
80 70 60 50 GAIN (dB) 40 30 20 10 0 -10 -20 TA = 25C AV = -10 RL = 100 1M 10M 100M FREQUENCY (Hz) VS = 2.5V GAIN PHASE VS = 2.5V VS = 6V VS = 6V 100 80 60 GAIN BANDWIDTH (MHz) 40 PHASE (DEG) 20 0 -20 -40 -60 -80 -100 1G
1969 G06
1969 G07
OUTPUT IMPEDANCE ()
Frequency Response vs Supply Voltage, AV = 10
23 22 21 20 TA = 25C AV = 10 RL = 100 23 22 21 20
GAIN (dB)
GAIN (dB)
18 17 16 15 14 13 1M VS = 2.5V
VS = 6V
18 17 16 15 14 VS = 2.5V
VS = 6V
GAIN (dB)
19
10M 100M FREQUENCY (Hz)
Frequency Response vs Supply Voltage, AV = -1
3 2 1 0 VS = 2.5V VS = 6V
GAIN (dB)
32 29 26 23 20 17 14 11 1G
1969 G12
POWER SUPPLY REJECTION (dB)
GAIN (dB)
-1 -2 -3 -4 -5 -6 TA = 25C AV = -1 RL = 100 RF = RG = 1k RC = 124 CC = 100pF SEE FIGURE 2 10M 100M FREQUENCY (Hz)
-7 1M
6
UW
1969 G09
Gain Bandwidth vs Supply Voltage
800
100
Output Impedance vs Frequency
TA = 25C AV = -10 RL = 1k
10 AV = 100 1
700
600
RL = 100 RL = 25
500
400
0.1
AV = 10
300 0 2 4 6 8 10 12 TOTAL SUPPLY VOLTAGE (V) 14
0.01 100k
1M 10M FREQUENCY (Hz)
100M
1969 G08
Frequency Response vs Supply Voltage, AV = -10
9 TA = 25C AV = -10 RL = 100 8 7 6 5 4 3 2 1 0 10M 100M FREQUENCY (Hz) 1G
1969 G10
Frequency Response vs Supply Voltage, AV = 2
VS = 2.5V VS = 6V
19
1G
13 1M
-1 1M
TA = 25C AV = 2 RL = 100 RF = RG = 1k RC = 124 CC = 100pF SEE FIGURE 3 10M 100M FREQUENCY (Hz) 1G
1969 G11
Frequency Response vs Capacitive Load
38 35 VS = 6V TA = 25C AV = 10 NO RL 100 1000pF 500pF 200pF 100pF 50pF 90 80 70 60 50 40 30 20 10 10M 100M FREQUENCY (Hz) 1G
1969 G13
Power Supply Rejection vs Frequency
VS = 6V AV = 10
(-) SUPPLY
(+) SUPPLY
8 1M
0 100k
1M 10M FREQUENCY (Hz)
100M
1969 G14
LT1969 TYPICAL PERFOR A CE CHARACTERISTICS - -
13k resistor from CTRL1 to V and a 49.9k resistor from CTRL2 to V Common Mode Rejection Ratio vs Frequency
100 COMMON MODE REJECTION RATIO (dB) 90 80 70 60 50 40 30 20 10 0 100k 1M 10M FREQUENCY (Hz) 100M
1969 G15
OUTPUT TO INPUT CROSSTALK (dB)
-40 -50 -60 -70 -80 -90 AB BA
DISTORTION (dBc)
Harmonic Distortion vs Frequency, AV = 10, VS = 2.5V
0 -10 -20
DISTORTION (dBc)
TA = 25C AV = 10 2VP-P OUT
DISTORTION (dBc)
-40 -50 -60 -70 -80 -90 RL = 25
-40 -50 -60 -70 -80 -90 3rd 2nd
DISTORTION (dBc)
-30
2nd 3rd
2nd 3rd
RL = 100 1M FREQUENCY (Hz) 10M
1969 G18
-100 100k
Harmonic Distortion vs Output Swing, AV = 10, VS = 6V
0 -10 -20 TA = 25C f = 1MHz 0 -10 -20
DISTORTION (dBc)
DISTORTION (dBc)
-40 -50 -60 -70 -80 -90 2nd 3rd 2nd 3rd 0 2 RL = 100 4 6 8 10 OUTPUT VOLTAGE (VP-P) 12
1969 G21
-40 -50 -60 -70 -80 -90 2nd 3rd 2nd 3rd 0 1 RL = 100 5
1969 G22
DISTORTION (dBc)
-30
RL = 25
-100
UW
VS = 6V TA = 25C
Amplifier Crosstalk vs Frequency
0 -10 -20 -30 VS = 6V AV = 10 RL = 100 INPUT = -20dBm
Harmonic Distortion vs Frequency, AV = 10, VS = 6V
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 2nd 3rd RL = 100 1M FREQUENCY (Hz) 10M
1969 G17
TA = 25C AV = 10 2VP-P OUT
2nd RL = 25 3rd
-100 1M
10M 100M FREQUENCY (Hz)
1G
1969 G16
-100 100k
Harmonic Distortion vs Resistive Load
0 -10 -20 -30 TA = 25C VS = 6V AV = 10 2VP-P OUT f = 1MHz 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 1 10 100 LOAD RESISTANCE () 1k
1969 G19
Harmonic Distortion vs Resistive Load
TA = 25C VS = 2.5V AV = 10 2VP-P OUT f = 1MHz
2nd 3rd
-100
1
10 100 LOAD RESISTANCE ()
1k
1969 G20
Harmonic Distortion vs Output Swing, AV = 10, VS = 2.5V
0 TA = 25C f = 1MHz -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 2 3 4 OUTPUT VOLTAGE (VP-P)
Harmonic Distortion vs Output Swing, AV = 2, VS = 6V
TA = 25C RF = RG = 1k RC = 124 CC = 100pF f = 1MHz SEE FIGURE 3
-30
RL = 25
RL = 25 2nd 2nd 3rd 3rd 0 2
RL = 100
-100
4 6 8 10 OUTPUT VOLTAGE (VP-P)
12
1969 G23
7
LT1969 TYPICAL PERFOR A CE CHARACTERISTICS
Harmonic Distortion vs Output Swing, AV = 2, VS = 2.5V
0 -10 -20 -30
HIGHEST HARMONIC DISTORTION (dBc)
HIGHEST HARMONIC DISTORTION (dBc)
DISTORTION (dBc)
-30 -40 -50 -60 -70 -80 -90
TA = 25C RF = RG = 1k RC = 124 CC = 100pF f = 1MHz SEE FIGURE 3
RL = 25 2nd 3rd 2nd 3rd 0 1 RL = 100 2 3 4 OUTPUT VOLTAGE (VP-P) 5
1969 G24
-100
Undistorted Output Swing vs Frequency
12
GAIN BANDWIDTH PRODUCT (MHz)
OUTPUT VOLTAGE SWING (VP-P)
10 8 6 4 2 0 100k TA = 25C AV = 10 RL = 100 1% DISTORTION
VS = 6V
800 600 400 200 0
PHASE MARGIN
VS = 2.5V
1M FREQUENCY (Hz)
Slew Rate vs Supply Current
400 350 VS = 6V
OUTPUT IMPEDANCE ()
250 200 150 100 50 0 0 1 8 10 6 4 ICC, PER AMPLIFIER (mA) 2 12
1969 G30
RISING FALLING
OUTPUT IMPEDANCE ()
300
SLEW RATE (V/s)
8
UW
1969 G27
Harmonic Distortion vs Output Current, VS = 6V
-30 TA = 25C AV = 10 f = 1MHz RL = 5 -50 RL = 10 -60 RL = 25 -70
Harmonic Distortion vs Output Current, VS = 2.5V
TA = 25C AV = 10 f = 1MHz RL = 5 -50 RL = 10 -60 RL = 25 -70
-40
-40
-80 0 200 300 400 100 PEAK OUTPUT CURRENT (mA) 500
1969 G25
-80 0 100 150 200 50 PEAK OUTPUT CURRENT (mA) 250
1969 G26
Gain Bandwidth Product vs Supply Current
1400 1200 1000 VS = 6V AV = -10
Phase Margin vs Supply Current
81 80 79 78 77 76 75 VS = 6V MEASURED AT AV = -10
10M
0
2
8 6 10 4 ICC, PER AMPLIFIER (mA)
12
1959 G28
0
2
10 4 6 8 ICC, PER AMPLIFIER (mA)
12
1969 G29
Output Impedance vs Supply Current
100 VS = 6V AV = 10 100
Output Impedance vs Frequency Low Power **
VS = 6V AV = 100
10
10
1
f = 1MHz
1
AV = 10
0.1
f = 600kHz
0.1
0.01 0 1 2 345678 ICC PER AMPLIFIER (mA) 9 10
0.01 100k
1M 10M FREQUENCY (Hz)
100M
1969 G32
1969 G31
LT1969 TYPICAL PERFOR A CE CHARACTERISTICS
Maximum IOUT Sourcing vs Quiescent Current
800 700 SHORT-CIRCUIT CURRENT VS = 6V
MAXIMUM IOUT (mA)
600 500 400 300 200 100 0 0 1 4 5 2 3 6 ICC PER AMPLIFIER (mA) 7 8
1969 G34 1969 G35
LINEAR OUTPUT CURRENT REGION
Small-Signal Transient, AV = 10, CL = 1000pF, Nominal Power*
1969 G36
Large-Signal Transient, AV = 10, CL = 1000pF, Nominal Power*
*13k RESISTOR FROM CTRL1 TO V - AND A 49.9k RESISTOR FROM CTRL2 TO V - ** 49.9k RESISTOR FROM CTRL2 TO V -, CTR1 FLOATING
UW
1969 G33
Small-Signal Transient, AV = 10, Nominal Power*
Small-Signal Transient, AV = -10, Nominal Power*
Large-Signal Transient, AV = 10, Nominal Power*
Large-Signal Transient, AV = -10, Nominal Power*
1969 G37
1969 G38
Small-Signal Transient, AV = 10, CL = 1000pF, Low Power**
1969 G39
1969 G40
9
LT1969 TYPICAL PERFOR A CE CHARACTERISTICS
Large-Signal Transient, AV = 10, Low Power** Large-Signal Transient, AV = - 10, Low Power**
*13k RESISTOR FROM CTRL1 TO V - AND A 49.9k RESISTOR FROM CTRL2 TO V - ** 49.9k RESISTOR FROM CTRL2 TO V -, CTR1 FLOATING
APPLICATIO S I FOR ATIO
Input Considerations
The inputs of the LT1969 are an NPN differential pair protected by back-to-back diodes (see the Simplified Schematic). There are no series protection resistors onboard which would degrade the input voltage noise. If the inputs can have a voltage difference of more than 0.7V, the input current should be limited to less than 10mA with external resistance (usually the feedback resistor or source resistor). Each input also has two ESD clamp diodes--one to each supply. If an input drive exceeds the supply, limit the current with an external resistor to less than 10mA. The LT1969 design is a true operational amplifier with high impedance inputs and low input bias currents. The input offset current is a factor of ten lower than the input bias current. To minimize offsets due to input bias currents, match the equivalent DC resistance seen by both inputs. The low input noise current can significantly reduce total noise compared to a current feedback amplifier, especially for higher source resistances. Layout and Passive Components With a gain bandwidth product of 700MHz the LT1969 requires attention to detail in order to extract maximum performance. Use a ground plane, short lead lengths and
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1969 G41
1969 G42
UU
a combination of RF-quality supply bypass capacitors (i.e., 470pF and 0.1F). As the primary applications have high drive current, use low ESR supply bypass capacitors (1F to 10F). For best distortion performance with high drive current a capacitor with the shortest possible trace lengths should be placed between Pins 1 and 5. The optimum location for this capacitor is on the back side of the PC board. The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can cause frequency peaking. In general, use feedback resistors of 1k or less. Thermal Issues The LT1969 enhanced JA MS10 package has the V- pin fused to the lead frame. This thermal connection increases the efficiency of the PC board as a heat sink. The PCB material can be very effective at transmitting heat between the pad area attached to the V- pin and a ground or power plane layer. Copper board stiffeners and plated throughholes can also be used to spread the heat generated by the device. Table 1 lists the thermal resistance for several different board sizes and copper areas. All measurements
LT1969
APPLICATIO S I FOR ATIO
were taken in still air on 3/32" FR-4 board with 2oz copper. This data can be used as a rough guideline in estimating thermal resistance. The thermal resistance for each application will be affected by thermal interactions with other components as well as board size and shape.
Table 1. Fused 10-Lead MSOP Package
COPPER AREA TOPSIDE* BACKSIDE (mm 2) (mm 2) 540 100 100 30 0 540 100 0 0 0 BOARD AREA (mm 2) 2500 2500 2500 2500 2500 THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 110C/W 120C/W 130C/W 135C/W 140C/W
*Device is mounted on topside.
Calculating Junction Temperature The junction temperature can be calculated from the equation: TJ = (PD)(JA) + TA TJ = Junction Temperature TA = Ambient Temperature PD = Device Dissipation JA = Thermal Resistance (Junction-to-Ambient)
6V
6 13k -6V
7
-6V
Figure 1. Thermal Calculation Example
+
49.9k
-
CTRL1
CTRL2
100
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As an example, calculate the junction temperature for the circuit in Figure 1 assuming an 70C ambient temperature. The device dissipation can be found by measuring the supply currents, calculating the total dissipation and then subtracting the dissipation in the load. The dissipation for the amplifiers is: PD = (63.5mA)(12V) - (4V/2)2/(50) = 0.6W The total package power dissipation is 0.6W. When a 2500 sq. mm PC board with 540 sq. mm of 2oz copper on top and bottom is used, the thermal resistance is 110C/W. The junction temperature TJ is: TJ = (0.6W)(110C/W) + 70C = 136C The maximum junction temperature for the LT1969 is 150C so the heat sinking capability of the board is adequate for the application. If the copper area on the PC board is reduced to 0 sq. mm the thermal resistance increases to 140C/W and the junction temperature becomes: TJ = (0.6W)(140C/W) + 70C = 154C which is above the maximum junction temperature indicating that the heat sinking capability of the board is inadequate and should be increased.
+ -
909 100 50 1K f = 1MHz -4V 4V -6V
1969 F01
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LT1969
APPLICATIO S I FOR ATIO
Capacitive Loading
The LT1969 is stable with a 1000pF capacitive load. The photo of the small-signal response with 1000pF load in a gain of 10 shows 50% overshoot. The photo of the largesignal response with a 1000pF load shows that the output slew rate is not limited by the short-circuit current. The Typical Performance Curve of Frequency Response vs Capacitive Load shows the peaking for various capacitive loads. This stability is useful in the case of directly driving a coaxial cable or twisted pair that is inadvertently unterminated. For best pulse fidelity, however, a termination resistor of value equal to the characteristic impedance of the cable or twisted pair (i.e., 50/75/100/135) should be placed in series with the output. The other end of the cable or twisted pair should be terminated with the same value resistor to ground.
Vi RC CC (OPTIONAL)
Figure 2. Compensation for Inverting Gains
Vi RC CC (OPTIONAL)
RG
1969 F03
Figure 3. Compensation for Noninverting Gains
12
-
+
+
-
RG
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Compensation The LT1969 is stable in a gain 10 or higher for any supply and resistive load. It is easily compensated for lower gains with a single resistor or a resistor plus a capacitor. Figure 2 shows that for inverting gains, a resistor from the inverting node to AC ground guarantees stability if the parallel combination of RC and RG is less than or equal to RF/9. For lowest distortion and DC output offset, a series capacitor, CC, can be used to reduce the noise gain at lower frequencies. The break frequency produced by RC and CC should be less than 15MHz to minimize peaking. The Typical Curve of Frequency Response vs Supply Voltage, AV = -1 shows less than 1dB of peaking for a break frequency of 12.8MHz. Figure 3 shows compensation in the noninverting configuration. The RC, CC network acts similarly to the inverting case. The input impedance is not reduced because the
RF Vo Vi Vo = -RF RG (RC || RG) RF/9 1 2RCCC
1969 F02
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< 15MHz
Vo Vi Vo
=1+
RF RG
(RC || RG) RF/9 1 < 15MHz
RF
2RCCC
LT1969
APPLICATIO S I FOR ATIO
network is bootstrapped. This network can also be placed between the inverting input and an AC ground. Another compensation scheme for noninverting circuits is shown in Figure 4. The circuit is unity gain at low frequency and a gain of 1 + RF/RG at high frequency. The DC output offset is reduced by a factor of ten. The techniques of Figures 3 and 4 can be combined as shown in Figure 5. The gain is unity at low frequencies, 1 + RF/RG at mid-band and for stability, a gain of 10 or greater at high frequencies. Output Loading The LT1969 output stage is very wide bandwidth and able to source and sink large currents. Reactive loading, even isolated with a back-termination resistor, can cause ringing at frequencies of hundreds of MHz. For this reason, any design should be evaluated over a wide range of output conditions. To reduce the effects of reactive loading, an
Vi
Vi VO =1+ RG RF/9 1 2RGCC
Vi RC CC
RF RG
(HIGH FREQUENCIES)
RF RG CC
< 15MHz RG CBIG
1969 F04
Figure 4. Alternate Noninverting Compensation
CABLE OR LINE WITH CHARACTERISTIC IMPEDANCE RL RBT VO RL RF RBT = RL
Vi
RG
Vo Vi
Figure 6. Standard Cable/Line Back-Termination
-
+
Vo
= 1 (LOW FREQUENCIES)
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optional snubber network consisting of a series RC across the load can provide a resistive load at high frequency. Another option is to filter the drive to the load. If a backtermination resistor is used, a capacitor to ground at the load can eliminate ringing. Line Driving Back-Termination The standard method of cable or line back-termination is shown in Figure 6. The cable/line is terminated in its characteristic impedance (50, 75, 100, 135, etc.). A back-termination resistor also equal to to the chararacteristic impedance should be used for maximum pulse fidelity of outgoing signals, and to terminate the line for incoming signals in a full-duplex application. There are three main drawbacks to this approach. First, the power dissipated in the load and back-termination resistors is equal so half of the power delivered by the amplifier is
Vo Vo Vi =1+ RF = 1 AT LOW FREQUENCIES RF RG =1+ RF (RC || RG) AT HIGH FREQUENCIES
1969 F05
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-
+
AT MEDIUM FREQUENCIES
Figure 5. Combination Compensation
=
1 2
(1 + RF/RG)
1969 F06
13
LT1969
APPLICATIO S I FOR ATIO
wasted in the termination resistor. Second, the signal is halved so the gain of the amplifer must be doubled to have the same overall gain to the load. The increase in gain increases noise and decreases bandwidth (which can also increase distortion). Third, the output swing of the amplifier is doubled which can limit the power it can deliver to the load for a given power supply voltage. An alternate method of back-termination is shown in Figure 7. Positive feedback increases the effective backtermination resistance so RBT can be reduced by a factor of n. To analyze this circuit, first ground the input. As RBT = RL/n, and assuming RP2>>RL we require that: Va = Vo (1 - 1/n) to increase the effective value of RBT by n. Vp = Vo (1 - 1/n)/(1 + RF/RG) Vo = Vp (1 + RP2/RP1)
RP2 RP1 Vi VP
RF RG
Figure 7. Back-Termination Using Positive Feedback
Vi
+ -
RF RG RP RP RG RF
-Vi
Figure 8. Back-Termination Using Differential Positive Feedback
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Eliminating Vp, we get the following: (1 + RP2/RP1) = (1 + RF/RG)/(1 - 1/n) For example, reducing RBT by a factor of n = 4, and with an amplifer gain of (1 + RF/RG) = 10 requires that RP2/RP1 = 12.3. Note that the overall gain is increased:
RP2 / (RP2 + RP1) Vo = Vi (1+ 1 / n) / (1+ RF / RG ) - RP1 / (RP2 + RP1)
+
-
-
+
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[
][
]
A simpler method of using positive feedback to reduce the back-termination is shown in Figure 8. In this case, the drivers are driven differentially and provide complementary outputs. Grounding the inputs, we see there is inverting gain of -RF/RP from -Vo to Va Va = Vo (RF/RP)
FOR RBT = 1+ RF RL n RP1 RP1 + RP2
Va RBT RL
Vo
( )(
RG Vo Vi =
)
=1-
1 n
RP2/(RP2 + RP1)
()
1+ RF RG
1 + 1/n
-
RP1 RP2 + RP1
1969 F07
Va RBT Vo FOR RBT = n= 1- 1 RF RP RL Vo Vi RBT -Va -Vo = 1+ RF RG + RF RF RP RL n
RL
2 1-
()
RP
1969 F08
LT1969
APPLICATIO S I FOR ATIO
and assuming RP >> RL, we require Va = Vo (1 - 1/n) solving RF/RP = 1 - 1/n
So to reduce the back-termination by a factor of 3 choose RF/RP = 2/3. Note that the overall gain is increased to: Vo/Vi = (1 + RF/RG + RF/RP)/[2(1 - RF/RP)] ADSL Driver Requirements The LT1969 is an ideal choice for ADSL upstream (CPE) modems. The key advantages are: 200mA output drive with only 1.7V worst-case total supply voltage headroom, high bandwidth, which helps achieve low distortion, low quiescent supply current of 7mA per amplifier and a space-saving, thermally enhanced MS10 package. An ADSL remote terminal driver must deliver an average power of 13dBm (20mW) into a 100 line. This corresponds to 1.41VRMS into the line. The DMT-ADSL peak-toaverage ratio of 5.33 implies voltage peaks of 7.53V into the line. Using a differential drive configuration and transformer coupling with standard back-termination, a transformer ratio of 1:2 is well suited. This is shown on the front page of this data sheet along with the distortion performance vs line voltage at 200kHz, which is beyond ADSL requirements. Note that the distortion is better than
+ -
1k 1.21k
Vi
523 1F
523 1k
-Vi
Figure 9. Power Saving ADSL Modem Driver
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Table 2. ADSL Upstream Driver Designs
STANDARD Line Impedance Line Power Peak-to-Average Ratio Transformer Turns Ratio Reflected Impedance Back-Termination Resistors Transformer Insertion Loss Average Amplifier Swing Average Amplifier Current Peak Amplifier Swing Peak Amplifier Current Total Average Power Consumption Supply Voltage 100 13dBm 5.33 2 25 12.5 1dB 0.79VRMS 31.7mARMS 4.21V Peak 169mA Peak 550mW Single 12V LOW POWER 100 13dBm 5.33 1 100 8.35 0.5dB 0.87VRMS 15mARMS 4.65V Peak 80mA Peak 350mW Single 12V
+
-
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-73dBc for all swings up to 16VP-P into the line. The gain of this circuit from the differential inputs to the line voltage is 10. Lower gains are easy to implement using the compensation techniques of Figure 5. Table 2 shows the drive requirements for this standard circuit. The above design is an excellent choice for desktop applications and draws typically 550mW of power. For portable applications, power savings can be achieved by reducing the back-termination resistor using positive feedback as shown in Figure 9. The overall gain of this circuit
8.45
1:1 100
1.21k
1969 F09
AV = 10 8.45
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LT1969
APPLICATIO S I FOR ATIO
is also 10, but the power consumption has been reduced to 350mW, a savings of 36% over the previous design. Note that the reduction of the back-termination resistor has allowed use of a 1:1 transformer ratio. Table 2 compares the two approaches. It may seem that the low power design is a clear choice, but there are further system issues to consider. In addition to driving the line, the amplifiers provide back-termination for signals that are received simultaneously from the line. In order to reject the drive signal, a receiver circuit is used such as shown in Figure 10. Taking advantage of the differential nature of the signals, the receiver can subtract out the drive signal and amplify the received signal. This method works well for standard back-termination. If the backtermination resistors are reduced by positive feedback, a portion of the received signal also appears at the amplifier outputs. The result is that the received signal is attenuated by the same amount as the reduction in the back-termination resistor. Taking into account the different transformer turns ratios, the received signal of the low power design will be one third of the standard design received signal.
RF
+
LT1813
VRX
-
LT1813
RF
Figure 10. Receiver Configuration
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The reduced signal has system implications for the sensitivity of the receiver. The power reduction may, or may not, be an acceptable system tradeoff for a given design. Controlling the Quiescent Current The quiescent current of the LT1969 is controlled via two control pins, CTRL1 and CTRL2. The pins can be used to either turn off the amplifiers, reducing the quiescent current on 2.5V supplies to less than 500A per amplifier, or to control the quiescent current in normal operation. Figure 11 shows how the control pins are used in conjunction with external resistors to program the supply current. In normal operation, each control pin is biased to approximately 1V above V - and by varying the resistor values, the current from each control pin can be adjusted. It is this current that sets the supply current of both amplifiers. If one of the resistors is open, i.e. R2, the supply current of the amplifiers will be set by CTRL1 and R1. Figure 12 shows supply current vs resistor value.
Va RBT VL 1:n RL -Va RBT -VL RD RG RL = REFLECTED IMPEDANCE RL VBIAS RL 2n2 RD RG SET RG RD = RL 2n2 2n2 + RBT RL 2n2 + RBT
1969 F10
+
-
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- +
n2
= ATTENUATION OF Va
LT1969
APPLICATIO S I FOR ATIO
V+ 1
+
OFF
-
CTRL1 6 R1 V- 5 V- V- CTRL2 7 R2
1969 F11
Figure 11
30 25 VS = 6V TA = 25C
ICC, BOTH AMPLIFIERS (mA)
20 15 10 5 0 0 10 20 30 40 50 60 70 80 90 100 RESISTANCE (k)
1969 F12
Figure 12. Supply Current vs Control Resistance (R1//R2)
Using CTRL1 and CTRL2 to set the supply current effectively places R1 and R2 in parallel obtaining a net resistance, and Figure 12 can still be utilized in determining supply current. The use of two pins to control the supply current allows for applications where external logic can be used to place the amplifiers in different supply current modes. Figure 13 illustrates a partial shutdown with direct logic on each control pin. If both logic inputs are low, the control pins will effectively see a resistance of 13k//49.9k = 10k to V -. This will set the amplifiers in nominal mode with a gain bandwidth of 700MHz and 200mA minimum IOUT. The electrical characteristics are specified in nominal mode. Forcing R1's input logic high will partially shut down the part, putting it in a low power mode. By keeping the output stage slightly biased, the output impedance
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CTRL1 6 R1 CTRL2 7 R2 OFF 3.3V/5V FROM V -
1969 F13
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ON
ON
Figure 13
remains low, preserving the line termination. The Typical Performance Characteristics curve Output Impedance vs Supply Current shows the details. Both logic inputs high further reduces the supply current and places the part in a "standby" mode with less than 500A per amplifier quiescent current. Output Loading in Low Current Modes The LT1969 output stage has a very wide bandwidth and is able to source and sink large amounts of current. The internal circuitry of the output stage incorporates a positive feedback boost loop giving it high drive capability. As the supply current is reduced, the sourcing drive capability also reduces. Maximum sink current is independent of supply current and is limited by the short-circuit protection at 500mA. If the amplifier is in a low power or "standby" mode, the output stage is slightly biased and is not capable of sourcing high output currents. The Typical Performance Characteristics curve Maximum IOUT Sourcing vs Quiescent Current shows the maximum output current for a given quiescent current. Considerations for Fault Protection The basic line driver design presents a direct DC path between the outputs of the two amplifiers. An imbalance in the DC biasing potentials at the noninverting inputs through either a fault condition or during turn-on of the system can create a DC voltage differential between the two amplifier outputs. This condition can force a considerable amount of current, 500mA or more, to flow as it is limited only by the small valued back-termination resistors and the DC resistance of the transformer primary. This high current can possibly cause the power supply voltage source to drop significantly impacting overall
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LT1969
APPLICATIO S I FOR ATIO
system performance. If left unchecked, the high DC current can heat the LT1969 to destruction. Using DC blocking capacitors to AC couple the signal to the transformer eliminates the possibility for DC current to flow under any conditions. These capacitors should be sized large enough to not impair the frequency response characteristics required for the data transmission. Another important fault related concern has to do with very fast high voltage transients appearing on the telephone line (lightning strikes for example). TransZorbsTM, varistors and other transient protection devices are often used to absorb the transient energy, but in doing so also
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create fast voltage transitions themselves that can be coupled through the transformer to the outputs of the line driver. Several hundred volt transient signals can appear at the primary windings of the transformer with current into the driver outputs limited only by the back termination resistors. While the LT1969 has clamps to the supply rails at the output pins, they may not be large enough to handle the significant transient energy. External clamping diodes, such as BAV99s, at each end of the transformer primary help to shunt this destructive transient energy away from the amplifier outputs.
TransZorb is a registered trademark of General Instruments, GSI
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LT1969
PACKAGE DESCRIPTIO
0.007 (0.18) 0.021 0.006 (0.53 0.015)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Dimensions in inches (millimeters) unless otherwise noted.
MS10 Package 10-Lead Plastic MSOP
(LTC DWG # 05-08-1661)
0.118 0.004* (3.00 0.102)
10 9 8 7 6
0.193 0.006 (4.90 0.15)
0.118 0.004** (3.00 0.102)
12345 0.043 (1.10) MAX 0 - 6 TYP SEATING PLANE 0.007 - 0.011 (0.17 - 0.27) 0.034 (0.86) REF
0.0197 (0.50) BSC
0.005 0.002 (0.13 0.05)
MSOP (MS10) 1100
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LT1969
TYPICAL APPLICATIO
130 3 100pF
+
VIN
-
100pF
130 8
-5V -5V -5V
VL VIN
=5
REFLECTED LINE IMPEDANCE = 100 / 22 = 25 EFFECTIVE TERMINATION = 2 * 6.19 * 2k 1k EACH AMPLIFIER: 0.56VRMS, 29.9mARMS 3V PEAK, 160mA PEAK = 24.8
RELATED PARTS
PART NUMBER LT1207 LT1396 LT1497 LT1795 LT1886 DESCRIPTION Dual 250mA, 60MHz Current Feedback Amplifier Dual 400MHz, 800V/s Current Feedback Amplifier Dual 125mA, 50MHz Current Feedback Amplifier Dual 500mA, 50MHz Current Feedback Amplifier Dual 700MHz, 200mA Op Amp COMMENTS Shutdown/Current Set Function 4.6mA Supply Current Set, 80mA IOUT 900V/s Slew Rate Shutdown/Current Set Function, ADSL CO Driver Gain of 10 Stable, Low Distortion
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
+
-
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Split Supply 5V ADSL CPE Line Driver
5V 4 5V 2 6.19 BAV99** -5V 0.47F** 1k 866 2k 1:2*
+ -
1
1/2 LT1969
+
100 VL
866 1k 9
2k 0.47F**
-
1/2 LT1969 5 6 13k
10 7
6.19 5V BAV99** -5V
49.9k
1969 TA02
*COILCRAFT X8390-A OR EQUIVALENT **SEE TEXT REGARDING FAULT PROTECTION
(ASSUME 0.5dB TRANSFORMER POWER LOSS)
1969f LT/TP 0301 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 2001

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